fn8784 rev.2.00 jun 20, 2017 GWS4621L dual 20v n-channel power mosfet datasheet fn8784 rev.2.00 page 1 of 8 jun 20, 2017 the GWS4621L is a dual 20v, 8.8m , n-channel power mosfet used for li-ion battery protection. it is offered in a 1.85mmx1.85mm lga with a very low thickness profile, 0.29mm typical thickness. it has extremely high power density, reducing the board size of the li-ion battery power system. designed for handheld de vices with a high level of esd protection. features ?monolithic dual mosfet ?low r ds(on) in a small footprint ? ultra low gate charge and figure of merit ? lga chip scale package ? low thermal resistance applications ? li-ion battery protection ? portable devices, cell phones, pda ? rated for short-circuit and overcurrent protection ? integrated g-s diodes provide esd protection of 2.5kv hbm product summary v (br)sss i d = 250a 20v minimum r ds(on) v gs = 4.5v 8.8m typical figure 1. equivalent circuit figure 2. pad view, 1.815mm x 1.815mm fet1 fet2 gate2 gate1 source2 source1 s1 s2 g1 g2 12 43
GWS4621L fn8784 rev.2.00 page 2 of 8 jun 20, 2017 pin configuration gws2350s (4 bump wlcsp) bottom view ordering information part number part marking temp range (c) package (rohs compliant) GWS4621L 21 -55 to +150 4 bump wlcsp s1 s2 g1 g2 12 43 pin descriptions pin # pin name description 1 s1 source of fet1 2g1gate of fet1 3g2gate of fet2 4 s2 source of fet2
GWS4621L fn8784 rev.2.00 page 3 of 8 jun 20, 2017 absolute maximum ratings ( note 1 ) thermal information source-to-source voltage (v ds ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-20v gate-to-source voltage (v gs ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8v source current (i s ) ( note 2 ) t a = +25c . . . . . . . . . . . . . . . . . . . . . . .10.1a (10s), 6.5a (steady state) t a = +70c . . . . . . . . . . . . . . . . . . . . . . . .8.1a (10s), 5.2a (steady state) source current (rthj foot ) t f = +25c . . . . . . . . . . . . . . 15a (steady state) pulsed source current (i sm ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60a esd rating human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.5kv thermal resistance (typical) ? ja (c/w) ? jf (c/w) t 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 steady state . . . . . . . . . . . . . . . . . . . . . . . . . 85 16 maximum power dissipation (p d ) ( note 2 ) t a = +25c . . . . . . . . . . . . . . . . . . . . . . 3.6w (10s) 1.47w (steady state) t a = +70c . . . . . . . . . . . . . . . . . . . . .2.29w (10s) 0.94w (steady state) junction and storage temperature range (t j , t stg ). . . . .-55c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see tb493 caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 1. t j = +25c unless otherwise noted. 2. surface mounted on fr4 board. electrical characteristics t j = +25c unless otherwise noted. symbol parameter test conditions min ( note 3 ) typ ( note 4 ) max ( note 3 )unit static v (br)sss source-to-source breakdown voltage v gs = 0v, i d = 250a 20 v i sss zero gate voltage source current v gs = 0v, v ds = 20v 1 a i gss gate body leakage v ds = 0v v gs = 6v 10 a v gs(th) gate threshold voltage v ds = v gs , i d = 1ma 0.5 0.8 1.5 v r ds(on) drain-to-source on-state resistance ( note 5 )v gs = 4.5v, i d = 3a 6.0 8.8 9.8 m v gs = 4.0v, i d = 3a 7.0 9.0 10.3 m v gs = 3.1v, i d = 3a 8.0 10.0 12.0 m v gs = 2.5v, i d = 3a 9.0 11.5 13.5 m r ss(on) source-to-source on-state resistance ( note 5 ) v gs = 4.5v, i s = 3a t j = +25c 12.0 17.5 19.5 m t j = +50c 12.0 21.0 23.0 m v gs = 4.0v, i s = 3a t j = +25c 14.0 18.0 20.5 m t j = +50c 14.0 22.0 24.0 m v gs = 3.1v, i s = 3a t j = +25c 16.0 20.0 24.0 m t j = +50c 16.0 23.0 27.0 m v gs = 2.5v, i s = 3a t j = +25c 18.0 23.0 27.0 m t j = +50c 18.0 26.0 30.0 m v ss source-to-source diode voltage v gs = 0, i s = 6.5a 0.8 1.0 v dynamic q g total gate charge v ss = 10v, i s = 5.0a, v gs = 4.0v 11 nc c iss input capacitance v ss = 10v, v gs = 0v, f = 1mhz 1125 pf c oss output capacitance 375 pf c rss reverse transfer capacitance 188 pf notes: 3. compliance to datasheet limits is assu red by one or more methods: production test, characterization, and/or design. 4. typical values are for t a = +25c. 5. good kelvin measurement required.
GWS4621L fn8784 rev.2.00 page 4 of 8 jun 20, 2017 test circuit examples for measuring fet1 key parameters figure 3. i sss test circuit figure 4. i gss test circuit figure 5. v gs(th) test circuit figure 6. r ss(on) test circuit figure 7. v fs-s test circuit s2 g2 g1 s1 a +v s2 g2 g1 s1 a v g2 g1 a +v s2 s1 v g2 g1 v v s2 s1 v 4.5v v g2 g1 s2 s1
GWS4621L fn8784 rev.2.00 page 5 of 8 jun 20, 2017 typical performance curves figure 8. output characteristics f igure 9. transfer characteristics figure 10. source-to-source on-s tate resistance vs source current figure 11. source-to-source on-state resistance vs gate-to-source voltage figure 12. source-to-source on-state resistance vs junction temperature figure 13. gate threshold voltage vs junction temperature 0 10 20 30 40 50 60 0112233 v ss - source-to-source voltage (v) v g s = 4.5v v gs = 2.5v v gs = 3.1v v gs = 4.0v i s -source current (a) 0 1 2 3 4 5 6 7 8 9 10 012 v gs - gate-to-source (v) t j = +125c t j = +25c t j = -25c t j = +75c i s -source current (a) 10 15 20 25 30 35 40 0 1 10 100 i s - source current (a) v gs = 2.5v v gs = 3.1v v gs = 4.0v v gs = 4.5v r ss(on) - on-state resistance (m ? ) 0 20 40 60 80 100 120 140 0 5 10 15 v gs - gate-to-source voltage (v) i s = 3a r ss(on) - on-state resistance (m ? ) 10 15 20 25 30 35 40 45 50 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) v gs = 2.5v v gs = 3.1v v gs = 4.0v v gs = 4.5v r ss(on) - on-state resistance (m ? ) 0.2 0.4 0.6 0.8 1.0 1.2 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) i s = 1ma v gs(th) - gate threshold voltage (v)
GWS4621L fn8784 rev.2.00 page 6 of 8 jun 20, 2017 figure 14. gate charge figure 15. source-to-source diode forward voltage figure 16. capacitance figure 17. maximum rated forw ard biased safe operating area figure 18. transient thermal response, junction-to-ambient typical performance curves (continued) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0510 qg - total gate charge (n c) v ss = 10v i s = 5a v gs = 0 to 4.0 v v gs - gate-to-source voltage (v) 1 10 100 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 v ss -source-to-source voltage (v) t j = +125c t j = ? +25c t j = ? -25c t j = +75c i s -source current (a) 10 100 100 0 100 00 0 5 10 15 20 v ss - source-to-source voltage (v) c i ss coss crss c-capacitance (pf) 0.01 0.1 1 10 100 0.1 1 10 100 v ss - source-to-source voltage (v) 10ms 1m s 100ms dc r ss(on) limited v gs = 4.5v t a = +25 o c, single pulse i s -source current (a) 0.01 0.10 1.00 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 1.0e+03 t-time (s) single pulse 0.02 0.05 0.10 0.20 0.50 r(t) - transient thermal resistance (normalized)
fn8784 rev.2.00 page 7 of 8 jun 20, 2017 GWS4621L intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2015-2017. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. about intersil intersil corporation is a leading provider of innovative power ma nagement and precision analog so lutions. the company's product s address some of the largest markets within the industrial and infrastructure, mobile computing, and high-end consumer markets. for the most updated datasheet, application notes, related documentation, and related parts, see the respective product information page found at www.intersil.com . for a listing of definitions and abbreviations of common terms used in our documents, visit www.intersil.com/glossary . you can report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask . reliability reports are also av ailable from our website at www.intersil.com/support . revision history the revision history provided is for informational purposes only and is believed to be accurate, but not warranted. please visi t our website to make sure that you have the latest revision. date revision change jun 20, 2017 fn8784.2 applied new header/footer. updated about intersil section. dec 21, 2015 fn8784.1 added ?note 1. t j = +25c unless otherwise noted.? to abs max on page 3. oct 30, 2015 fn8784.0 initial release
fn8784 rev.2.00 page 8 of 8 jun 20, 2017 GWS4621L intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2015-2017. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. outline drawing (unit: mm) 1.815 12 43 1.815 1-pin index mark s1 1: source 1 2: gate 1 3: gate 2 4: source 2 top view 0.29 side view ? 0.35 + + + + 0.65 0.65 pad view
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